C-V measurements are used to characterize frequency dispersion [17] and to obtain Entospletinib order permittivity

of the CeO2 thin films. A typical set of C-V characteristics of the as-deposited (dashed line) under different frequencies (100 Hz, 1 kHz, 10 kHz, 100 kHz, and 1 MHz) is shown in Figure 4 for the sample deposited at 250°C. C-V measurements are carried out from strong inversion (-1 V) toward strong accumulation (2 V). Noticeable frequency dispersion on C-V curves is observed. Frequency dispersion in C-V or capacitance-frequency measurements are categorized into two parts: extrinsic and intrinsic. Extrinsic frequency dispersion includes (1) parasitic effect, (2) lossy interfacial layer effect, YH25448 datasheet (3) surface roughness effect, (4) polysilicon depletion effect, and (5) quantum mechanical effect. For part 1 of the extrinsic frequency dispersion, parasitic effects in MOS devices contain parasitic resistances and capacitances such as bulk series resistances, contacts (including contact between the MOS capacitor and probe station), cables, and many other parasitic

effects. The parasitic effects can simply be minimized by using suitable cables and selleck inhibitor also by depositing an aluminum thin film at the back of a large-area silicon substrate. For the cerium oxide samples, the aluminum back contact and substrate area is approximately 2 × 2 cm2. Concerning Selleck Nutlin 3 part 2, the existence of extrinsic frequency dispersion in some high-k materials (LaAlO3) is mainly due to the effect of the lossy interfacial layer between the high-k thin film and silicon substrate on the MOS capacitor. Relative thicker thickness of the high-k thin film than the interfacial layer significantly

prevented frequency dispersion. For the cerium oxide samples, the high-k thin film thicknesses for 150°C, 200°C, 250°C, 300°C, and 350°C are 51, 43, 50, 31, and 44 nm, respectively, from spectroscopic ellipsometry. The SiO2 interfacial layer thickness is approximately 1.6 nm, which leads to much larger capacitance than the high-k thin film. Thus, lossy interfacial layer effect is excluded for the cerium oxide samples. In terms of part 3, the surface roughness is not responsible for the observed extrinsic frequency dispersion of the high-k thin films used in the paper. With respect to part 4, the poly depletion effect will become more significant leading to reduced surface potential, channel current, and gate capacitance. However, the polysilicon depletion effect is not under consideration for the samples here because the gates of the MOS capacitor samples were Au-fabricated by thermal evaporation through a shadow mask. Finally, as regards part 5, for oxide thickness down towards 1 to 3 nm, the quantum mechanical effect should be taken into account. The cerium oxide samples are not suitable for the domain (greater than 30 nm at least).